1. Field of the Invention
The present invention relates to digital memory devices and operation thereof, and more particularly to NAND flash memory having an enhanced buffer read capability and methods of operation thereof.
2. Description of Related Art
NAND flash memory is popular for data storage. The cost versus density advantage of single level cell (“SLC”) NAND flash memory in densities of 512 Megabits and higher is largely due to the inherently smaller memory cell size used in SLC NAND flash technology.
NAND flash memory is also becoming popular for a variety of applications in addition to data storage, including code shadowing. Although commonly used SLC NAND flash memory has architectural, performance and bad block limitations that make it difficult to support the high speed code shadow applications for which serial NOR flash memory is well suited, various techniques have been developed to adapt NAND flash memory to such applications. Moreover, NAND flash memory has been developed with serial interface compatibility and a high degree of instruction compatibility with serial NOR flash memory. Unfortunately, some instructions execute quite slowly on a NAND flash memory architecture.